برنامه سون سگمنت

 

In this project, we will design a counter module that counts from "0" to "9".  We will use a seven segment display for monitoring the counter and then simulate the project with Tina Software.

Due to the constraints in Tina, we don't define the output of module as a vector. Instead, we will define 7 separate outputs. We won't apply any time-delay on the VHDL Code during simulation with Tina.

Note: But in real applications we must exert  a delay in the VHDL Code. Otherwise we can't percieve the changes on seven segment  display.

In Tina we will use common anode seven segment display. This means that when '0' is applied to the LEDs, they become "ON" , else the LEDs become "OFF".

Before begining the project let's take a quick look at the seven segment.


SEVEN SEGMENT DISPLAY

    

Seven segment  comprises of seven individual LEDs. One terminal of all LEDs are connected together into a common lead, while the other terminal of each LED is individually available.

There are two types of seven segment display

  •   Common Anode (positive terminals) : Common terminal of the LEDs is connected to power.
  •   Common Cathode (negative terminals):Common terminal of the LEDs is connected to ground.

 VHDL CODE -SEVEN SEGMENT

--           0
--         ----  
--  5 |          | 1
--         ----   <- 6
--  4 |          | 2
--        ----
--         3

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity seven_segment is
       Port (   clk          : in     STD_LOGIC;
                    output1 : out  STD_LOGIC;
                    output2 : out  STD_LOGIC;
                    output3 : out  STD_LOGIC;
                    output4 : out  STD_LOGIC;
                    output5 : out  STD_LOGIC;
                    output6 : out  STD_LOGIC;
                    output7 : out  STD_LOGIC);
     end seven_segment;

architecture Behavioral of seven_segment is
signal temp: std_logic_vector(6 downto 0);
signal  counter: integer:=0;
    begin 
       process(clk)
           begin
              if clk'event and clk='1' then                 
                      if counter = 9 then
                            counter <=0;
                     else
                        couneter<= counter + 1;
                  end if; 
         end process;
   output1 <= temp(0);
   output2 <= temp(1);
   output3 <= temp(2);
   output4 <= temp(3);
   output5 <= temp(4);
   output6 <= temp(5);
   output7 <= temp(6);

   with counter Select
       temp<= "1000000" when 0,   
                      "1111001" when 1, 
                      "0100100" when 2,
                      "0110000" when 3,
                      "0011001" when 4,
                      "0010010" when 5,
                      "0000010" when 6, 
                      "1111000" when 7, 
                      "0000000" when 8,
                      "0010000" when 9,         
                      "1000000" when others;

end Behavioral;

 

 Simulation

Open Tina Software and create a new project.

If you wonder how to create a new project in Tina, see counter 1 example.

Create the macro of the VHDL Code and place this macro in the Schematic Editor.

Select 7 Segment  Display in Meters part from Tool Bar and place it in the Schematic Editor.

Select Clock in Sources part from Tool Bar, place it in the Schematic Editor.

Make all connections.

Note: We don't use the point of seven segment in this project so we won't make any connections of related pin of seven segment.

Choose VHDL by clicking Interactive mode on/off button.

Press Interactive mode on/off button and begin the simulation. Have a good time...

 


 

برچسب ها: 

دیدگاه‌ها

salam mishe lotfan ye mesale karbordi ba tozihat dar bareye nahveye piyade saziye yek controller (masalan PI) begzarid kheily mamnon

دیدگاه جدیدی بگذارید

CAPTCHA
This question is for testing whether or not you are a human visitor and to prevent automated spam submissions.
1 + 11 =
Solve this simple math problem and enter the result. E.g. for 1+3, enter 4.